Modern defence and aerospace systems are generating far more information than earlier computing architectures were designed to process. High-resolution radar, infrared sensors, autonomous platforms and real-time intelligence systems can produce enormous streams of data that must be analysed immediately, often in aircraft, satellites, ships or remote ground installations.
Sending every dataset back to a central data centre introduces latency, consumes communications bandwidth and creates dependence on connections that may be disrupted or unavailable. Intel argues in its Secure Enclave analysis of tactical-edge computing that more processing must therefore occur close to the sensor, where decisions can be made without waiting for a distant system.
The difficulty is that tactical platforms operate within strict limits on size, weight and power, commonly described as SWaP. A system cannot simply add larger processors, more cooling equipment and additional power supplies whenever its computing requirements increase.
Why Legacy Architectures Are Becoming Inadequate
Many established defence systems still depend on mature semiconductor processes and analogue-heavy signal-processing chains. Those architectures may remain reliable, but they can struggle to scale as sensors become more detailed and mission software becomes more demanding.
Higher-resolution radar systems must process more signals. Infrared imaging systems must distinguish increasingly subtle patterns. Artificial intelligence applications may need to classify objects, detect anomalies or prioritise threats within fractions of a second.
Intel’s analysis notes that aircraft must divide limited electrical power among propulsion support, communications, sensors, electronic warfare and other systems. Space platforms face an even greater thermal challenge because heat cannot be removed through ordinary convection in a vacuum. Adding processing capacity without improving efficiency can therefore create problems elsewhere on the platform.
This leaves system designers with an uncomfortable choice. They can limit computing capability to stay within existing power and cooling limits, or send more data to another location for processing and accept greater latency and communications exposure.
Edge-Native Processing Changes the Architecture
An edge-native design processes information where it is created rather than treating the sensor as a simple collection device.
In an all-digital radar system, local processors can examine incoming signals and transmit only relevant detections instead of sending the complete raw dataset across the network. A space-based infrared sensor could similarly identify possible launch signatures onboard and immediately prioritise the most important information.
This does not eliminate central data centres or command systems. It changes how work is divided between them. The tactical platform handles time-sensitive filtering, classification and decision support, while larger systems perform broader analysis, coordination and long-term storage.
The approach can reduce bandwidth demand and shorten the interval between detection and response. It can also allow a platform to continue performing critical functions when communications are degraded, contested or temporarily unavailable. Intel presents this transition from analogue-heavy processing to digital edge architectures as central to future systems operating across air, land, sea, space and cyber environments.
Intel 18A Targets Performance Within Tight Power Limits
Intel positions its 18A manufacturing process as an important foundation for this type of edge computing. The technology combines two major changes: RibbonFET transistors and PowerVia backside power delivery.
RibbonFET is Intel’s gate-all-around transistor design. The gate surrounds the transistor channel more completely than in a traditional FinFET structure, providing greater control over electrical current and supporting continued scaling.
PowerVia moves part of the chip’s power-delivery network to the back of the silicon. Signal wiring and power wiring traditionally compete for space on the front side of a chip. Separating them can reduce routing congestion and improve power distribution. Intel explains both technologies through its official Intel 18A process overview.
Intel claims that, compared with its Intel 16 process technology, Intel 18A can deliver five times the power efficiency, twice the performance or as much as a tenfold reduction in area, depending on how a design is optimised. These are Intel-provided comparisons rather than independent benchmarks, and real-world results will depend on the chip design, workload, packaging, memory and operating conditions.
For a tactical system, the potential value is straightforward. Greater efficiency could place more processing capability inside an existing power envelope instead of forcing the platform to become larger, heavier or more difficult to cool.
Advanced Packaging Allows Different Chips to Work Together
A leading-edge processor alone cannot perform every task efficiently. Radar processing, artificial intelligence, radio-frequency functions, networking and general computing may benefit from different types of silicon.
Advanced packaging allows those components to be combined as chiplets within one integrated package. Some chiplets can use an advanced manufacturing node, while less demanding components can remain on mature and potentially less expensive processes.
Intel Foundry supports 2D, 2.5D and 3D integration, including technologies that place chiplets side by side or stack them vertically. This can shorten communication paths between components and allow designers to build a specialised system without manufacturing every function on one enormous piece of silicon.
The US Department of Defense has already explored this model through the State-of-the-Art Heterogeneous Integrated Packaging programme. The department said its SHIP prototypes were intended to demonstrate advanced functionality, lower power, smaller size and improved performance for defence systems. Its official SHIP programme update also described the programme as a way to provide continuing access to modern commercial packaging capabilities.
Secure Enclave Refers to Manufacturing, Not a CPU Enclave
The name can create confusion because Intel also offers Software Guard Extensions, or SGX, which protects selected code and data inside processor-based secure enclaves.
The Secure Enclave discussed in this context is different. It is a US government-supported manufacturing programme intended to provide a protected environment for designing, fabricating, packaging and testing sensitive microelectronics.
Intel describes the programme as a secure overlay within its commercial manufacturing system. It is being developed with the Department of the Air Force to support domestic production of mission-critical semiconductors. The objective is not merely to encrypt information while software is running. It is to protect the broader path through which sensitive chips move from design to completed hardware.
For comparison, Intel SGX is an application-level confidential-computing technology. It isolates selected code and data during execution so that other software and administrators cannot freely access them. The two uses of “enclave” address different layers of risk.
Supply-Chain Security Is Part of the Computing Problem
A high-performance chip can still create national-security concerns when its manufacturing history, intellectual property or component provenance cannot be confidently verified.
Defence programmes may need greater visibility into where sensitive designs are processed, who can access them, where fabrication occurs and how finished components are packaged and tested. Dependence on geographically concentrated overseas supply chains can also create disruption risks during trade disputes, natural disasters or military conflict.
Intel received a US government manufacturing award of up to $3 billion for the Secure Enclave programme in 2024. The programme builds on earlier work involving RAMP-C, which provides defence customers with access to commercial foundry services, and SHIP, which focuses on advanced heterogeneous packaging.
Intel’s broader US semiconductor manufacturing overview describes Secure Enclave as an effort to expand trusted domestic production of leading-edge semiconductors for government applications.
Faster Development Matters as Much as Faster Processing
Defence electronics can take years to design, qualify and deploy. By the time a highly customised system reaches operational use, commercial semiconductor technology may have advanced through several generations.
Intel argues that secure access to commercial manufacturing, digital design tools and modular chiplet architectures could shorten the journey from initial design to deployable hardware. Through RAMP-C, Intel Foundry has worked with defence-industry organisations including Boeing, Northrop Grumman and other technology partners on early prototypes using its manufacturing ecosystem.
Digital twins and hardware-accurate virtual models can also allow engineers to test performance, thermal behaviour and system interactions before committing a design to fabrication. Intel’s discussion of domestic manufacturing for mission-critical technology presents this digital-first approach as a way to detect problems earlier and reduce development risk.
Significant Engineering Challenges Remain
Moving legacy systems to Intel 18A or another leading-edge process is not a straightforward replacement exercise.
Gate-all-around transistors, backside power delivery and three-dimensional packaging require new design methods, verification tools and specialist expertise. Higher transistor density may also increase local heat concentration, making packaging and cooling increasingly important.
Long defence qualification cycles create another barrier. Mission-critical hardware may need extensive testing for radiation, vibration, temperature extremes, reliability and long-term availability. Programme leaders may prioritise cost and schedule certainty over theoretical performance improvements, particularly when an older component has already been proven in the field.
Secure domestic manufacturing can reduce some supply-chain risks, but it cannot eliminate design errors, software vulnerabilities, physical attacks or operational misuse. Intel itself cautions that no product or component can be made absolutely secure.
Why Secure Edge Computing Could Become Decisive
The tactical advantage of edge computing does not come only from producing more calculations per second. It comes from converting sensor data into useful information while a decision can still influence the outcome.
A radar system that classifies a threat locally, an autonomous platform that adapts without constant connectivity or a satellite that prioritises significant observations before transmission can operate more effectively within contested environments.
Intel’s Secure Enclave strategy connects that operational requirement with two supporting capabilities: highly efficient computing based on Intel 18A and a protected domestic manufacturing pathway for sensitive hardware.
The programme’s success will depend on whether Intel and its government partners can deliver the promised performance, maintain competitive production economics and shorten deployment schedules without weakening verification standards. If those conditions are met, Secure Enclave could make advanced tactical computing more powerful, more responsive and less dependent on vulnerable external supply chains.
